Field-programmable gate arrays allow for fast prototyping and design of computing devices. Many pre-designed, modular computer processing modules exist for fast, powerful creation of such computing devices. It is typical to design computing devices with one or more video processing functions to provide video data for display to an end user.
Video processing functions generally involve a video pipeline including several video processing hardware modules that retrieve and process pixel data. Because the pixel data may be generated by different data creators, such pixel data is generally stored in a common memory buffer, such as a main system memory, for retrieval by the modules of the video pipeline. A module referred to as a video direct memory access (VDMA) module functions to retrieve pixel data from the memory buffer and transmit that pixel data to the modules of the pipeline for processing. Because video processing generally works according to particular timings, which are governed by video frame rate, resolution, and, potentially, other factors, the VDMA manages the timings with which video data is retrieved from the memory, as well as other aspects associated with interfacing with memory to obtain pixel data.
Many video pipelines include multiple video processing hardware modules, each of which interfaces, independently, with the system memory. Typically, in order to accommodate such situations, multiple VDMA modules are provided. Each VDMA module has independent access to the system memory and is thus able to access data in the system memory.
There are several issues with providing multiple independent VDMA modules as described above. One issue is that not each video processing hardware module has the same bandwidth characteristics, because not each video processing hardware module reads and processes the data at the same speed. Thus, the different VDMA modules are typically manually programmed based on the different bandwidth characteristics of the different hardware modules, as including over-sized VDMA modules would be wasteful. Another issue is that including multiple VDMA modules leads to multiple instances of infrastructure for coupling those VDMA modules to the other parts of the computing device being designed. A further issue is that because each VDMA module is programmed to accommodate the particular function being performed by the associated video processing hardware module, multiple VDMA modules means that programming must be performed multiple times.
As can be seen, what is needed in the art are improved techniques for accommodating various video processing applications.